1. Field of the Invention
The present invention relates to receiving apparatuses and particularly to a receiving apparatus shared by a plurality of tuners.
2. Description of the Background Art
FIG. 5 is a block diagram showing a structure of a receiving unit of a conventional satellite broadcasting system. Referring to FIG. 5, the receiving unit of the satellite broadcasting system includes an antenna 30 having a reflector 31 and an LNB (Low Noise Block down converter) 32, a receiver 33 having a DBS (Direct Broadcasting by Satellite) tuner 34, an FM demodulator 35, a video+audio circuit 36 and an amplifier 37, and a television receiver 38.
Radio waves xcex1 emitted from a satellite are supplied via reflector 31 to LNB 32. LNB 32 extracts from the received radio waves a image signals of a plurality of channels, amplifies the signals with noise kept low, and supplies an image signal of a channel selected by DBS tuner 34 to DBS tuner 34. An output signal of LNB 32 is supplied via DBS tuner 34 to FM demodulator 35 which FM-demodulates the output signal.
The FM-demodulated image signal is converted to a video signal and an audio signal by video+audio circuit 36, amplified by amplifier 37 and then supplied to television receiver 38. An image of the channel selected by DBS tuner 34 is displayed on the screen of television receiver 38.
FIG. 6 is a perspective view showing from the outside a structure of LNB 32. Referring to FIG. 6, LNB 32 has a casing member 41, and a feed phone 42 and a signal input/output terminal 43 are provided on the surface of casing member 41. Radio waves xcex1 reflected from reflector 31 of antenna 30 are supplied into an opening 42a of feed phone 42. In casing 41, a signal processing circuit is provided for processing the radio waves xcex1 supplied to feed phone 42. Signal input/output terminal 43 is connected to DBS tuner 34 via a cable.
FIG. 7 is a circuit block diagram showing a structure of the signal processing circuit of LNB 32. Referring to FIG. 7, the signal processing circuit includes LNAs (Low Noise Amplifiers) 44a and 44b, bandpass filters (BPFs) 45a-45d, local oscillators 46a and 46b, mixers 47a-47d, a selector 48, an IF amplifier 49, a low-pass filter (LPF) 50 and a regulator 51.
A horizontally polarized wave signal xcfx86h and a vertically polarized wave signal xcfx86v received by feed phone 42 are respectively amplified by LNAs 44a and 44b with noise kept low. An output signal of LNA 44a is supplied to bandpass filters 45a and 45c and an output signal of LNA 44b is supplied to bandpass filters 45b and 45d. 
Signals xcfx86h and xcfx86v have a frequency band of 10.7-12.75 GHz. Bandpass filters 45a and 45b pass only the frequency components in the range of 10.7 to 11.7 GHz of respective signals xcfx86h and xcfx86v. Bandpass filters 45c and 45d pass only the frequency components in the range of 11.7 to 12.75 GHz of respective signals xcfx86h and xcfx86v. Respective signals xcfx86h1, xcfx86v1, xcfx86h2 and xcfx86v2 passed through bandpass filters 45a-45d are supplied respectively to mixers 47a-47d. 
Local oscillator 46a generates a high-frequency signal of 9.75 GHz and supplies it to mixers 47a and 47b. Local oscillator 46b generates a high-frequency signal of 10.6 GHz and supplies it to mixers 47c and 47d. Signals xcfx86h1 and xcfx86v1 are converted respectively by mixers 47a and 47b into respective IF signals xcfx861 and xcfx862 of 950-1950 MHz. Signals xcfx86h2 and xcfx86v2 are converted respectively by mixers 47c and 47d into respective IF signals xcfx863 and xcfx864 of 1000-2150 MHz.
Selector 48 selects any of four IF signals xcfx861-xcfx864 according to a DC voltage V1 and a clock signal CLK supplied from DBS tuner 34 via input/output terminal 43 and low-pass filter 50 and supplies the selected IF signal to DBS tuner 34 via IF amplifier 49 and input/output terminal 43. The DC voltage V1 is 18 V or 13 V. The clock signal CLK has a frequency of 22 KHz and an amplitude of 0.6 V. Low-pass filter 50 allows DC voltage V1 and clock signal CLK to pass while it does not pass IF signals xcfx861-xcfx864.
If DC voltage V is 18 V, signals xcfx861 and xcfx863 are selected. If DC voltage V1 is 13 V, signals xcfx862 and xcfx864 are selected. If no clock signal CLK is input, signals xcfx861 and xcfx862 are selected and signals xcfx863 and xcfx864 are selected if clock signal CLK is input. Accordingly, signal xcfx861 is selected if DC voltage V1 is 18 V and no clock signal CLK is input, signal xcfx862 is selected if DC voltage V1 is 13 V and no clock signal CLK is input, signal xcfx863 is selected if DC voltage V1 is 18 V and clock signal CLK is input, and signal xcfx864 is selected if DC voltage V1 is 13 V and clock signal CLK is input.
DC voltage V1 is also used as the supply voltage of regulator 51. Regulator 51 uses DC voltage V1 as the supply voltage to generate a DC constant voltage V2 of 9 V and a DC constant voltage V3 of 5 V. DC constant voltage V2 of 9 V generated by regulator 51 is applied to IF amplifier 49 as its supply voltage, and DC constant voltage V3 of 5 V generated by regulator 51 is applied to LNAs 44a and 44b and local oscillators 46a and 46b as their supply voltage.
In recent years, there arises a need to share one LNB by a plurality of DBS tuners 34. For example, referring to FIG. 8, an LNB 55 shared by two DBS tuners 34 is provided with one feed phone 57 and two signal input/output terminals 58a and 58b on a casing member 56.
Regarding such an LNB 55, there is a problem that how supply voltages V2 and V3 for the LNA, local oscillator and IF amplifier should be generated. For example, according to the following description in conjunction with FIG. 9, two signal input/output terminals 58a and 58b are connected to a power supply node 61a of a regulator 61 via respective low-pass filters 59a and 59b and respective diodes 60a and 60b. Diodes 60a and 60b are provided for preventing, when one of the two signal input/output terminals 58a and 58b is supplied with 18 V and the other thereof is supplied with 13 V, current flow from one signal input/output terminal to the other signal input/output terminal to cause malfunction or breakdown of DBS tuners 34.
In this case, supposing that consumption current of LNB 55 is 200 mA, if DC voltages applied respectively to two signal input/output terminals 58a and 58b are the same (18 V or 13 V), currents of the same value (100 mA) flow through respective two signal input/output terminals 58a and 58b. However, if 18 V and 13 V are supplied respectively to signal input/output terminals 58a and 58b, current of 200 mA flows through signal input/output terminal 58a and no current flows through signal input/output terminal 58b. On the contrary, if signal input/output terminals 58a and 58b are supplied with 13 V and 18 V respectively, current of 200 mA flows through signal input/output terminal 58b and no current flows through signal input/output terminal 58a. For this reason, each time a channel is switched, current flowing from two DBS tuners 34 to LNB 55 greatly varies, generating noise. This noise causes a selector to malfunction, resulting in selection of a channel different from a desired channel or disorder of an image on a television receiver 38.
One object of the present invention is accordingly to provide a receiving apparatus which can be shared by a plurality of tuners while noise is reduced.
According to the present invention, a receiving apparatus includes a plurality of signal input/output terminals connected respectively to a plurality of tuners, an extraction/amplification circuit extracting/amplifying a plurality of image signals from received radio waves, a switch circuit provided correspondingly to each signal input/output terminal to select one image signal according to a level of DC voltage supplied from a corresponding tuner and supplying the selected image signal to the tuner, and a power supply circuit driven by DC voltage supplied from each signal input/output terminal to generate supply voltage for the extraction/amplification circuit and equally distribute consumption current of the extraction/amplification circuit among the signal input/output terminals. Therefore, even if DC voltages applied respectively to the signal input/output terminals have respective levels different from each other, or even if the level of the DC voltage for each signal input/output terminal is changed, a constant current flows through each signal input/output terminal. Consequently, there is less noise compared with the conventional receiving apparatus where the current flowing through each signal input/output terminal considerably varies.
Preferably, the power supply circuit includes a first voltage generating circuit provided correspondingly to each signal input/output terminal and driven by DC voltage applied via the corresponding signal input/output terminal to generate a first DC voltage, a second voltage generating circuit driven by DC voltage applied via at least one signal input/output terminal to generate a second DC voltage, and a transistor provided correspondingly to each first voltage generating circuit and having a first electrode receiving the first DC voltage generated by the corresponding first voltage generating circuit and an input electrode receiving the second DC voltage generated by the second voltage generating circuit for providing supply current from its second electrode to the extraction/amplification circuit. In this way, currents of the same value flow through respective transistors, and the sum of the currents of the transistors correspond to consumption current of the extraction/amplification circuit.
Still preferably, the power supply circuit further includes a plurality of diode elements connected respectively between the signal input/output terminals and a power supply node of the second voltage generating circuit. In this way, from any signal input/output terminal supplied with the highest DC voltage, the second voltage generating circuit receives DC voltage via a corresponding diode element.
Still preferably, the receiving apparatus further includes an amplification circuit provided correspondingly to each signal input/output terminal and driven by the first DC voltage generated by its corresponding first voltage generating circuit to amplify the image signal from its corresponding switch circuit and transmit the amplified image signal to the corresponding signal input/output terminal. In this way, the image signal can be amplified sufficiently. Further, as no supply voltage is applied to any amplification circuit not in use, reduction of power consumption is possible.